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APD Bias Supply Circuit

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This is design circuit for a high voltage APD bias supply. This circuit is design for current monitor function. This is the figure of the circuit.


This circuit is based on LT1930A switching regulator and L1 form a fly back based boost stage. The fly back events pump a diode-capacitor network tripler, producing a high voltage DC output. Feedback from the output via the R1-R2 combination stabilizes the regulator’s operating point D6 and D7 protect the switch and feedback pins, respectively, from parasitic negative excursions and the 10W resistors prevent excessive switch current. C8 and C9, series connected for high voltage capability, minimize output noise. A 0V to 4.5V programming voltage results in a corresponding 90V to 30V output (3% accuracy) with about 2mA of current capacity. Circuit output noise is quite low. Figure 7, taken with 500mA loading at VOUT = 50V, shows about 200mV ripple and harmonic residue in a 10MHz bandwidth. This is adequate for most APD receivers.

[Circuit’s source design: Linear Technology Notes].

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